This invention relates to a data transferring system for use in carrying out data transfer in a streaming manner between a peripheral controller and an input-output channel unit in a data processing device.
A data processing device of the type described, comprises an interface between the peripheral controller and the input-output channel. The interface comprises a data line, a start informing signal line (namely, an SCI line), a start informing acknowledgement signal line (that is, an SEO line), a strobe pulse signal line (or, an STI line), and a strobe pulse acknowledgement signal line (namely, an STO line).
The peripheral controller comprises a control circuit which comprises a strobe pulse signal generator for producing a strobe pulse signal to deliver the strobe pulse signal to the strobe pulse signal line. The control circuit further comprises a signal producer for producing, during a preselected time interval, a start code signal having a start code representative of a start of the data transfer. The signal producer produces a start informing signal of logic "1" level during production of the start code signal. The start informing signal is for informing the input-output channel unit of production of the start code signal. The signal producer delivers the start informing signal to the start informing signal line. Connected to the signal producer and the data line, a first buffer memory periodically memorizes and stores the start code signal as a memorized code signal at a first period which is determined by a strobe pulse acknowledgement signal. The first buffer memory delivers the first stored or memorized code signal to the data line.
The input-output channel unit comprises a first receiver connected to the start informing signal line for receiving the start informing signal as a received informing signal. Connected to the first receiver and the start informing acknowledgement signal line, a first transmitter transmits the received informing signal to the start informing acknowledgement signal line as a start informing acknowledgement signal to deliver the start informing acknowledgement signal to the control circuit. A register is connected to the data line and the first receiver. Enabled by the received informing signal, the register registers the memorized code signal as a registered code signal.
Connected to the strobe pulse signal line, a second receiver receives the strobe pulse signal as a received pulse signal. A second transmitter is connected to the second receiver and the strobe pulse acknowledgement signal line to transmit the received pulse signal to the strobe pulse acknowledgement signal.
A second buffer memory is connected to the data line and to a main memory. The first and the second buffer memory transmit transfer data between the main memory and a peripheral device connected to the second buffer memory through the data line under control of the strobe pulse signal and the strobe pulse acknowledgement signal after transfer of the start code signal.
In the data transferring system which carries out the data transfer in a streaming method, each of the strobe pulse line and the strobe pulse acknowledgement line is not put into an interlock state when the transfer data are transferred between the peripheral controller and the input-output channel unit. Therefore, when an overrun detecting circuit detects an overrun in the input-output channel unit, the input-output channel unit stops delivery of the strobe pulse acknowledgement signal to the strobe pulse acknowledgement signal line. The input-output channel unit further informs the peripheral controller of occurrence of the overrun. When the peripheral controller is informed that the overrun occurs in the input-output channel unit, the peripheral controller carries out a command retry processing in which a leading part of a transfer command memorized in the main memory is again transferred from the main memory to the peripheral controller.
The overrun mainly occurs in the input-output channel unit due to shortage of a memory capacity of the second buffer memory when access contention takes place between the input-output channel unit and other input-output channel units for the main memory.
Therefore, the input-output channel unit may again start accessing the main memory when a predetermined time interval lapses after occurrence of the contention. Inasmuch as the data transfer is suspended or stopped by stopping delivery of the strobe pulse acknowledgement signal from the input-output channel unit to the strobe pulse acknowledgement signal line when the overrun occurs, the command retry processing which needs a long time should be carried out.
When a small amount of the transfer data is transferred between the input-output channel unit and the peripheral controller, the data processing device is hardly influenced. When the transfer data has a long length, the data processing device is influenced in the following manner.
It will be assumed that the transfer data has an 8 MB (megabit) length and that the transfer data is transferred at an effective transmission rate which is equal to 3 MB per second. In this case, it is necessary in general to finish the data transfer at a time interval which is equal to 8/3 seconds. However, it is necessary in a worst case to finish the data transfer at another time interval of 16/3 seconds. Inasmuch as a long time is wasted in the worst case, the data processing system may be put in a system down state. In order to inhibit the system down state of the data processing device, the data processing device may be provided with a specific signal transmission line between the input-output channel unit and the peripheral controller. Such provision of the specific transmission line results in an increase of hardware of the data processing device.